Demands for increased performance, functionality and economy of manufacture of semiconductor integrated circuits have driven the decrease of minimum lithographic feature size and increase of integration density to extreme levels to the point that millions of discrete devices may be formed on a single chip and spaced from each other by distances measured in hundreds or even tens of nanometers. However, as devices such as transistors and capacitors are scaled to smaller sizes, performance may be degraded significantly and highly sophisticated designs for transistors, capacitors and the like have been developed to maintain and even enhance performance of individual devices formed at sizes at the limits of or even exceeding lithographic resolution.
Further, as integration density has been increased (which, among other beneficial effects, reduces signal propagation time and noise susceptibility) some undesired effects have been discovered. Specifically, when transistors have been scaled to smaller sizes, the so-called on/off ratio of channel resistance has been decreased both by reduction of conduction channel cross-section increasing resistance when a transistor is in the “on” state and by leakage in the “off” state due to reduced ability to control conduction from the transistor gate at low voltages necessary to answer heat dissipation design constraints. It has also been recently discovered that, at extremely high integration densities, difficulty in increasing “off” state resistance of transistors and limiting transistor leakage has been encountered even with extremely sophisticated and difficult to manufacture transistor designs with limited manufacturing yield.
These difficulties are particularly critical in high capacity dynamic memories (or high density dynamic memories of lesser capacity which are desirably integrated on the same chip with extensive logic or digital processing circuitry) where data may be stored as a few hundred or fewer individual electrons. In such an application where the storage mechanism is necessarily highly ephemeral, leakage of a relatively few electrons can change data states of a stored bit and relatively high refresh rates are required to prevent data corruption. High refresh rates, in turn, consume significant time as well as power and increase worst case memory access time; severely compromising potential performance. Further, even with the provision of redundant circuitry for a chip design, improper formation of a relatively small number of elements on the chip (where the number of such elements is greatly increased to provide desired increase of integration density and memory capacity) can result in a chip which cannot be made fully functional.